PWM-Experiment

schaltung/xperiment/Makefile

+all: dampfmascine_tb
+
+dampfmascine_tb.o:	dampfmascine.o
+
+dampfmascine_tb:	dampfmascine_tb.o dampfmascine.o
+	ghdl -e dampfmascine_tb
+
+%.o : %.vhd
+	ghdl -a $<
+clean:
+	rm dampfmascine_tb.o dampfmascine.o

schaltung/xperiment/dampfmascine.vhd

+----------------------------------------------------------------------------------
+-- Company: 
+-- Engineer: 
+-- 
+-- Create Date:    11:02:24 02/05/2012 
+-- Design Name: 
+-- Module Name:    dampfmascine - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity dampfmascine is
+    Port ( takt : in  STD_LOGIC;
+           pwm : in  STD_LOGIC_VECTOR (3 downto 0);
+           led : out  STD_LOGIC);
+end dampfmascine;
+
+architecture Behavioral of dampfmascine is
+signal ct: STD_LOGIC_VECTOR ( 3 downto 0 );
+begin
+process( takt,ct, pwm )
+begin
+ if( rising_edge( takt ) ) then
+  case( ct ) is
+  when "0000"=> ct<="0001";
+  when "0001"=> ct<="0010";
+  when "0010"=> ct<="0011";
+  when "0011"=> ct<="0100";
+  when "0100"=> ct<="0101";
+  when "0101"=> ct<="0110";
+  when "0110"=> ct<="0111";
+  when "0111"=> ct<="1000";
+  when "1000"=> ct<="1001";
+  when "1001"=> ct<="1010";
+  when "1010"=> ct<="1011";
+  when "1011"=> ct<="1100";
+  when "1100"=> ct<="1101";
+  when "1101"=> ct<="1110";
+  when "1110"=> ct<="1111";
+  when "1111"=> ct<="0000";
+  when others=> ct<="0000";
+  end case;
+ end if;
+ if( ct < pwm ) then
+  led<='1';
+ else
+  led<='0';
+ end if;
+end process;
+end Behavioral;
+

schaltung/xperiment/dampfmascine_tb.vhd

+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+use IEEE.NUMERIC_STD.ALL;
+--  A testbench has no ports.
+entity dampfmascine_tb is
+end dampfmascine_tb;
+
+architecture behav of dampfmascine_tb is
+  --  Declaration of the component that will be instantiated.
+  component dampfmascine
+    port (takt : in STD_LOGIC;
+           pwm : in  STD_LOGIC_VECTOR (3 downto 0);
+           led : out  STD_LOGIC);
+  end component;
+  --  Specifies which entity is bound with the component.
+  for dampfmascine_0: dampfmascine use entity work.dampfmascine;
+  signal takt,led : STD_LOGIC;
+  signal pwm : STD_LOGIC_VECTOR (3 downto 0);
+begin
+  --  Component instantiation.
+  dampfmascine_0: dampfmascine port map (takt => takt, pwm => pwm,
+                                         led => led);
+  
+  --  This process does the real job.
+  process
+    type pattern_type is record
+      --  The inputs of the adder.
+      takt : STD_LOGIC;
+      pwm  : STD_LOGIC_VECTOR (3 downto 0);
+      --  The expected outputs of the adder.
+      led  : STD_LOGIC;
+
+    end record;
+    --  The patterns to apply.
+    type pattern_array is array (natural range <>) of pattern_type;
+    constant patterns : pattern_array :=
+      (('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0000", '0'),
+       ('1', "0000", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '1'),
+       ('0', "0111", '1'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "0111", '0'),
+       ('1', "0111", '0'),
+       ('0', "1111", '0'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '1'),
+       ('0', "1111", '1'),
+       ('1', "1111", '0'));
+  begin
+    --  Check each pattern.
+    for i in patterns'range loop
+      --  Set the inputs.
+    takt <= patterns(i).takt;
+    pwm <= patterns(i).pwm;
+    --  Wait for the results.
+    wait for 1 ns;
+    --  Check the outputs.
+    assert led = patterns(i).led
+      report "bad led out value" severity error;
+    end loop;
+    assert false report "end of test" severity note;
+    --  Wait forever; this will finish the simulation.
+    wait;
+  end process;
+end behav;
+
+
+          

schaltung/xperiment/readme.txt

+Simple PWM zum Ausprobieren...
+Makefile für GHDL